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rt6238a/b ? ds6238a/b-08 july 2017 www.richtek.com 1 copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. ? 8a, 18v, 500khz, acot tm synchronous step-down converter general description the rt6238a/b is a high-performance 500khz, 8a step- down regulator with internal power switches and synchronous rectifiers. it features quick transient response using its advanced constant on-time (acot tm ) control architecture that provides stable operation with small ceramic output capacitors and without complicated external compensation, among other benefits. the input voltage range is from 4.5v to 18v and the output is adjustable from 0.7v to 8v. the proprietary acot tm control improves upon other fast response constant on-time architectures, achieving nearly constant switching frequency over line, load, and output voltage ranges. since there is no internal clock, response to transients is nearly instantaneous and inductor current can ramp quickly to maintain output regulation without large bulk output capacitance. the rt6238a/b is stable with and optimized for ceramic output capacitors. with internal 35m switches and 14m synchronous rectifiers, the rt6238a/b displays excellent efficiency and good behavior across a range of applications, especially for low output voltages and low duty cycles. cycle-by-cycle current limit provides protection against shorted outputs, input under-voltage lockout, externally-adjustable soft-start, output under- and over-voltage protection, and thermal shutdown provide safe and smooth operation in all operating conditions. the rt6238a/b is available in the uqfn-14l 2x3 (fc) package, with exposed thermal pad. applications ? industrial and commercial low power systems ? computer peripherals ? lcd monitors and tvs ? green electronics/appliances ? point of load regulation for high-performance dsps, fpgas, and asics simplified application circuit features ? ? ? ? ? fast transient response ? ? ? ? ? advanced constant on-time (acot tm ) control ? ? ? ? ? 4.5v to 18v input voltage range ? ? ? ? ? adjustable output voltage from 0.7v to 8v ? ? ? ? ? 8a output current ? ? ? ? ? 35m internal high-side n-mosfet and 14m internal low-side n-mosfet ? ? ? ? ? steady 500khz switching frequency ? ? ? ? ? up to 95% efficiency ? ? ? ? ? optimized for all ceramic capacitors ? ? ? ? ? externally-adjustable, pre-biased compatible soft- start ? ? ? ? ? cycle-by-cycle current limit ? ? ? ? ? input under-voltage lockout ? ? ? ? ? output over- and under-voltage protection ? ? ? ? ? power good output ? ? ? ? ? thermal shutdown rt6238a/b pvcc vin v in ss v out en en signal pgood power good boot sw fb gnd
rt6238a/b 2 ds6238a/b-08 july 2017 www.richtek.com ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. pin configurations (top view) uqfn-14l 2x3 (fc) pgood pvcc agnd fb sw gnd gnd gnd vin ss gnd boot en vin 6 13 11 10 9 8 1 2 3 4 14 5 12 7 ordering information note : richtek products are : ? rohs compliant and compatible with the current require- ments of ipc/jedec j-std-020. ? suitable for use in snpb or pb-free soldering processes. marking information 0k : product code w : date code rt6238algquf 0h : product code w : date code rt6238blgquf 0l : product code w : date code RT6238AHGQUF 0j : product code w : date code rt6238bhgquf 0kw 0hw 0lw 0jw rt6238a/b package type quf : uqfn-14l 2x3 (u-type) (fc) lead plating system g : green (halogen free and pb free) uvp option h : hiccup mode uvp l : latched ovp & uvp a : psm b : pwm
rt6238a/b 3 ds6238a/b-08 july 2017 www.richtek.com ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. function block diagram functional pin description pin no. pin name pin function 1 agnd analog gnd. 2 fb feedback voltage input. it is used to regulate the output of the converter to a set value via an external resistive voltage divider. the feedback reference voltage is 0.7v typically. 3 pvcc internal regulator output. connect a 1 ? f capacitor to gnd to stabilize output voltage. 4 pgood power good indicator open-drain output. 5 boot bootstrap supply for high-side gate driver. this capacitor is needed to drive the power switch's gate above the supply voltage. it is connected between the sw and boot pins to form a floating supply across the power switch driver. a 0.1 ? f capacitor is recommended for use. 6 sw switch node. connect this pin to an external l-c filter. 7, 8 vin power input. the input voltage range is from 4.5v to 18v. must bypass with a suitably large ( ? 10 ? f x 2) ceramic capacitor. 9, 10, 11, 12 gnd ground. 13 en enable control input. a logic-high enables the converter; a logic-low forces the ic into shutdown mode reducing the supply current to less than 10 ? a. the en pin can be connected to vin with a 100k ? pull-up resistor for automatic start-up. the pull-up resistance should not small than 60k ? to prevent en pin voltage over than absolute maximum rating. 14 ss soft-start time setting. an external capacitor should be connected between this pin and gnd. reg ugate lgate driver boot pvcc control vibias on-time v in min. off ripple gen. v ref comparator ss sw gnd en pvcc oc + - 6a pvcc uv & ov vin comparator + - fb 0.9 v ref pgood sw gnd sw sw fb pvcc v in + - + 5k 3v 1.2/1.01 0.4 + - ?
rt6238a/b 4 ds6238a/b-08 july 2017 www.richtek.com ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. detailed description the rt6238a/b is a high-performance 500khz 8a step- down regulators with internal power switches and synchronous rectifiers. it features an advanced constant on-time (acot tm ) control architecture that provides stable operation with ceramic output capacitors without complicated external compensation, among other benefits. the acot tm control mode also provides fast transient response, especially for low output voltages and low duty cycles. the input voltage range is from 4.5v to 18v and the output is adjustable from 0.7v to 8v. the proprietary acot tm control scheme improves upon other constant on-time architectures, achieving nearly constant switching frequency over line, load, and output voltage ranges. the rt6238a/b are optimized for ceramic output capacitors. since there is no internal clock, response to transients is nearly instantaneous and inductor current can ramp quickly to maintain output regulation without large bulk output capacitance. constant on-time (cot) control the heart of any cot architecture is the on-time one shot. each on-time is a pre-determined ? fixed ? period that is triggered by a feedback comparator. this robust arrangement has high noise immunity and is ideal for low duty cycle applications. after the on-time one-shot period, there is a minimum off-time period before any further regulation decisions can be considered. this arrangement avoids the need to make any decisions during the noisy time periods just after switching events, when the switching node (sw) rises or falls. because there is no fixed clock, the high-side switch can turn on almost immediately after load transients and further switching pulses can ramp the inductor current higher to meet load requirements with minimal delays. traditional current mode or voltage mode control schemes typically must monitor the feedback voltage, current signals (also for current limit), and internal ramps and compensation signals, to determine when to turn off the high-side switch and turn on the synchronous rectifier. weighing these small signals in a switching environment is difficult to do just after switching large currents, making those architectures problematic at low duty cycles and in less than ideal board layouts. because no switching decisions are made during noisy time periods, cot architectures are preferable in low duty cycle and noisy applications. however, traditional cot control schemes suffer from some disadvantages that preclude their use in many cases. many applications require a known switching frequency range to avoid interference with other sensitive circuitry. true constant on-time control, where the on-time is actually fixed, exhibits variable switching frequency. in a step-down converter, the duty factor is proportional to the output voltage and inversely proportional to the input voltage. therefore, if the on-time is fixed, the off-time (and therefore the frequency) must change in response to changes in input or output voltage. modern pseudo-fixed frequency cot architectures greatly improve cot by making the one-shot on-time proportional to vout and inversely proportional to vin. in this way, an on-time is chosen as approximately what it would be for an ideal fixed-frequency pwm in similar input/output voltage conditions. the result is a big improvement but the switching frequency still varies considerably over line and load due to losses in the switches and inductor and other parasitic effects. another problem with many cot architectures is their dependence on adequate esr in the output capacitor, making it difficult to use highly-desirable, small, low-cost, but low-esr ceramic capacitors. most cot architectures use ac current information from the output capacitor, generated by the inductor current passing through the esr, to function in a way like a current mode control system. with ceramic capacitors the inductor current information is too small to keep the control loop stable, like a current mode system with no current information. acot tm control architecture making the on-time proportional to vout and inversely proportional to vin is not sufficient to achieve good constant-frequency behavior for several reasons. first, voltage drops across the mosfet switches and inductor cause the effective input voltage to be less than the
rt6238a/b 5 ds6238a/b-08 july 2017 www.richtek.com ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. measured input voltage and the effective output voltage to be greater than the measured output voltage. as the load changes, the switch voltage drops change causing a switching frequency variation with load current. also, at light loads if the inductor current goes negative, the switch dead-time between the synchronous rectifier turn-off and the high-side switch turn-on allows the switching node to rise to the input voltage. this increases the effective on time and causes the switching frequency to drop noticeably. one way to reduce these effects is to measure the actual switching frequency and compare it to the desired range. this has the added benefit eliminating the need to sense the actual output voltage, potentially saving one pin connection. acot tm uses this method, measuring the actual switching frequency and modifying the on-time with a feedback loop to keep the average switching frequency in the desired range. to achieve good stability with low-esr ceramic capacitors, acot tm uses a virtual inductor current ramp generated inside the ic. this internal ramp signal replaces the esr ramp normally provided by the output capacitor's esr. the ramp signal and other internal compensations are optimized for low-esr ceramic output capacitors. acot tm one-shot operation the rt6238a/b control algorithm is simple to understand. the feedback voltage, with the virtual inductor current ramp added, is compared to the reference voltage. when the combined signal is less than the reference and the on- time one-shot is triggered, as long as the minimum off- time one-shot is clear and the measured inductor current (through the synchronous rectifier) is below the current limit. the on-time one-shot turns on the high-side switch and the inductor current ramps up linearly. after the on time, the high-side switch is turned off and the synchronous rectifier is turned on and the inductor current ramps down linearly. at the same time, the minimum off-time one-shot is triggered to prevent another immediate on-time during the noisy switching time and allow the feedback voltage and current sense signals to settle. the minimum off-time is kept short (230ns typical) so that rapidly-repeated on- times can raise the inductor current quickly when needed. discontinuous operating mode (rt6238a only) after soft-start, the rt6238a operates in fixed frequency mode to minimize interference and noise problems. the rt6238a uses variable-frequency discontinuous switching at light loads to improve efficiency. during discontinuous switching, the on-time is immediately increased to add ? hysteresis ? to discourage the ic from switching back to continuous switching unless the load increases substantially. the ic returns to continuous switching as soon as an on- time is generated before the inductor current reaches zero. the on-time is reduced back to the length needed for 500khz switching and encouraging the circuit to remain in continuous conduction, preventing repetitive mode transitions between continuous switching and discontinuous switching. current limit the rt6238a/b current limit is a cycle-by-cycle ? valley ? type, measuring the inductor current through the synchronous rectifier during the off-time while the inductor current ramps down. the current is determined by measuring the voltage between source and drain of the synchronous rectifier . if the inductor current exceeds the current limit, the on-time one-shot is inhibited (mask high side signal) until the inductor current ramps down below the current limit. thus, only when the inductor current is well below the current limit is another on time permitted. this arrangement prevents the average output current from greatly exceeding the guaranteed current limit value, as typically occurs with other valley-type current limits. if the output current exceeds the available inductor current (controlled by the current limit mechanism), the output voltage will drop. if it drops below the output under-voltage protection level the ic will stop switching (see next section). output under-voltage protection hiccup mode the rt6238ah/rt6238bh provide hiccup mode under- voltage protection (uvp). when the fb voltage drops below 60% of the feedback reference voltage, the output voltage drops below the uvp trip threshold for longer than 270 s (typical) then ic ' s uvp is triggered. uvp function
rt6238a/b 6 ds6238a/b-08 july 2017 www.richtek.com ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. will be triggered to shut down switching operation. if the uvp condition remains for a period, the rt6238 will retry automatically. when the uvp condition is removed, the converter will resume operation. the uvp is disabled during soft-start period. during hiccup mode, the shutdown time is determined by the capacitor at ss. a 2 a current source discharges v ss from its starting voltage (normally vpvcc). the ic remains shut down until v ss reaches 0.2v, about 10ms for a 3.9nf capacitor. at that point the ic begins to charge the ss capacitor at 6 a, and a normal start-up occurs. if the fault remains, uvp protection will be enabled when v ss reaches 2.2v (typical). the ic will then shut down and discharge the ss capacitor from the 2.2v level, taking about 4ms for a 3.9nf ss capacitor. latch mode for the rt6238al/rt6238bl, it provides latch-off mode under voltage protection (uvp). when the fb voltage drops below 60% of the feedback reference voltage, the output voltage drops below the uvp trip threshold for longer than 270 s (typical) then ic ' s uvp is triggered. uvp function will be triggered to shut down switching operation. in shutdown condition, the rt6238 can be reset by en pin or power input vin. output over-voltage protection if the output voltage vout rises above the regulation level and lower 1.2 times regulation level, the high-side switch naturally remains off and the synchronous rectifier turns on. for rt6238bl, if the output voltage remains high, the synchronous rectifier remains on until the inductor current reaches the low side current limit. if the output voltage still remains high, then ic ' s switches remain that the synchronous rectifier turns on and high-side mos keeps off to operate at typical 500khz switching protection, again if inductor current reaches low side current limit, the synchronous rectifier will turn off until next protection clock. if the output voltage exceeds the ovp trip threshold (1.2 times regulation level) for longer than 10 s (typical), then ic ' s output over-voltage protection (ovp) is triggered. rt6238bl chip enters latch mode. for rt6238al, if the output voltage vout rises above the regulation level and lower 1.2 times regulation level, the high-side switch naturally remains off and the synchronous rectifier turns on until the inductor current reaches zero current. if the output voltage remains high, then ic ' s switches remain off. if the output voltage exceeds the ovp trip threshold (1.2 times regulation level) for longer than 10 s (typical), the ic ' s ovp is triggered. rt6238al chip enters latch mode. for rt6238bh, if the output voltage remains high, the synchronous rectifier remains on until the inductor current reaches the low side current limit. if the output voltage still remains high, the synchronous rectifier turns on and high-side mosfet keeps off to operate at typical 500khz switching protection, again if inductor current reaches low side current limit, the synchronous rectifier will turn off until next protection clock. rt6238bh is without ovp latch function and recover when ov condition release. for rt6238ah, if the output voltage remains high, the synchronous rectifier remains on until the inductor current reaches zero current. if the output voltage still remains high, then ic ' s switches remain off. rt6238ah is without ovp latch function and recover when ov condition release. latch-off mode the rt6238al/bl uses latch-off mode ovp and uvp. when the protection function is triggered, the ic will shut down in latch-off mode. the ic stops switching, leaving both switches open, and is latched off. to restart operation, toggle en or power the ic off and then on again. shut-down, start-up and enable (en) the enable input (en) has a shutdown level of 0.4v. when v en is below this level the ic enters shutdown mode and supply current drops to less than 10 a. when v en exceeds its logic-high level of 1.2v the ic is fully operational. between these 2 levels there are 2 thresholds (1v typical and 1.2v typical). switching operation begins when v en exceeds the upper threshold, and then switching operation stops when v en decreases to the lower threshold. since en is a low voltage input, it must be connected to vin (up to 18v) with a 100k pull-up resistor for automatic start-up.
rt6238a/b 7 ds6238a/b-08 july 2017 www.richtek.com ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. do not leave ss unconnected. during start-up, while the ss capacitor charges, the rt6238a/b operates in discontinuous switching mode with very small pulses. this prevents negative inductor currents and keeps the circuit from sinking current. therefore, the output voltage may be pre-biased to some positive level before start-up. once the v ss ramp charges enough to raise the internal reference above the feedback voltage, switching will begin and the output voltage will smoothly rise from the pre-biased level to its regulated level. after v ss rises above about 2.2v output over- and under-voltage protections are enabled and the rt6238a/b begins continuous-switching operation. internal regulator (pvcc) an internal linear regulator (pvcc) produces a 5v supply from vin. the 5v power supplies the internal control circuit, such as internal gate drivers, pwm logic, reference, analog circuitry, and other blocks. 1 f ceramic capacitor for decoupling and stability is required. ?? out out lim ss ref c v 0.75 1.2 t = i load current 0.8 t6 a c v ??? ?? ? ? pgood comparator pgood is an open-drain output controlled by a comparator connected to the feedback signal. if fb exceeds 90% of the internal reference voltage, pgood will be high impedance. otherwise, the pgood output is connected to gnd. external bootstrap capacitor (c boot ) connect a 0.1 f low esr ceramic capacitor between boot and sw. this bootstrap capacitor provides the gate driver supply voltage for the high-side n-channel mosfet switch. some of case, such like duty ratio is higher than 65% application or input voltage is lower than 5.5v which are recommended to add an external bootstrap diode between an external 5v and boot pin for efficiency improvement the bootstrap diode can be a low cost one such as in4148 or bat54. the external 5v can be a 5v fixed input from system or a 5v output of the rt6238a/b. note that the external boot voltage must be lower than 5.5v over-temperature protection the rt6238a/b includes an over-temperature protection (otp) circuitry to prevent overheating due to excessive power dissipation. the otp will shut down switching operation when the junction temperature exceeds 150 c. once the junction temperature cools down by approximately 20 c the ic will resume normal operation with a complete soft-start. for continuous operation, provide adequate cooling so that the junction temperature does not exceed 150 c. input under-voltage lockout in addition to the enable function, the rt6238a/b feature an under-voltage lockout (uvlo) function that monitors the internal linear regulator output (vin). to prevent operation without fully-enhanced internal mosfet switches, this function inhibits switching when vin drops below the uvlo-falling threshold. the ic resumes switching when vin exceeds the uvlo-rising threshold soft-start (ss) the rt6238a/b soft-start uses an external pin (ss) to clamp the output voltage and allow it to slowly rise. after v en is high and vin exceeds its uvlo threshold, the ic begins to source 6 a from the ss pin. an external capacitor at ss is used to adjust the soft-start timing. following below equation to get the minimum capacitance range in order to avoid uv occur.
rt6238a/b 8 ds6238a/b-08 july 2017 www.richtek.com ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. (v in = 12v, t a = 25 c, unless otherwise specified) electrical characteristics recommended operating conditions (note 4) ? supply voltage, vin ------------------------------------------------------------------------------------------------ 4.5v to 18v ? junction temperature range -------------------------------------------------------------------------------------- ? 40 c to 125 c ? ambient temperature range -------------------------------------------------------------------------------------- ? 40 c to 85 c absolute maximum ratings (note 1) ? supply voltage, vin ------------------------------------------------------------------------------------------------ ? 0.3v to 21v ? switch voltage, sw ------------------------------------------------------------------------------------------------ ? 0.3v to (v in + 0.3v) ? switch voltage, <10ns --------------------------------------------------------------------------------------------- ? 3v to (v in + 0.3v) ? boot v oltage -------------------------------------------------------------------------------------------------------- ? 0.3v to 27.3v ? en to gnd ------------------------------------------------------------------------------------------------------------- ? 0.3v to 6v ? other pins ------------------------------------------------------------------------------------------------------------- ? 0.3v to 6v ? power dissipation, p d @ t a = 25 c uqfn-14l 2x3 (fc) ------------------------------------------------------------------------------------------------- 2.1w ? package thermal resistance (note 2) uqfn-14l 2x3 (fc), ja ------------------------------------------------------------------------------------------- 47.5 c/w uqfn-14l 2x3 (fc), jc ------------------------------------------------------------------------------------------- 4.1 c/w ? junction temperature range -------------------------------------------------------------------------------------- 150 c ? lead temperature (soldering, 10 sec.) ------------------------------------ ------------------------------------- 260 c ? storage temperature range -------------------------------------------------------------------------------------- ? 65 c to 150 c ? esd susceptibility (note 3) hbm (human body model) ---------------------------------------------------------------------------------------- 2kv parameter symbol test conditions min typ max unit supply current supply current (shutdown) i shdn v en = 0v -- 1.5 6 ? a supply current (quiescent) i q v en = 2v, v fb = 0.7v -- 0.6 0.9 ma logic threshold en input voltage logic-high 1.1 1.2 1.3 v logic-low 0.85 1.01 1.15 v fb voltage and discharge resistance feedback threshold v fb 4.5v ? v in ? 18v 0.692 0.7 0.708 v feedback current i fb v fb = 0.71v ? 0.1 -- 0.1 ? a v pvcc output v pvcc output voltage v pvcc 6v ? v in ? 18v, 0 < i pvcc ? 5ma -- 5 -- v line regulation 6v ? v in ? 18v, i pvcc = 5ma -- -- 5 mv load regulation 0 ? i pvcc ? 20ma -- -- 20 mv output current i pvcc v in = 6v, v pvcc = 4v, t a = 25 ? c -- 210 -- ma
rt6238a/b 9 ds6238a/b-08 july 2017 www.richtek.com ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. note 1. stresses beyond those listed ? absolute maximum ratings ? may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions may affect device reliability. note 2. ja is measured at t a = 25 c on a highly thermal conductive four-layer test board. jc is measured at the exposed pad of the package. note 3. devices are esd sensitive. handling precaution is recommended. note 4. the device is not guaranteed to function outside its operating conditions. parameter symbol test conditions min typ max unit r ds(on) switch on-resistance r ds(on)_h v boot ? v sw = 5v -- 35 -- m ? r ds(on)_l -- 14 -- current limit valley current limit i lim 9.5 11 12.5 a thermal shutdown thermal shutdown threshold t sd -- 150 -- ? c thermal shutdown hysteresis ? t sd -- 20 -- on-time timer control on-time t on v in = 12v, v out = 1.05v -- 175 -- ns minimum on-time t on(min) -- 60 -- ns minimum off-time t off(min) -- 200 -- ns soft-start ss charge current v ss = 0v 5 6 7 ? a uvlo uvlo threshold wake up v pvcc 4 4.2 4.4 v hysteresis -- 0.5 -- power good pgood threshold fb rising 85 90 95 % fb falling -- 80 -- % pgood sink current pgood = 0.1v 10 20 -- ma output under-voltage and over-voltage protection ovp trip threshold ovp detect 115 120 125 % ovp propagation delay -- 10 -- ? s uvp trip threshold uvp detect 55 60 65 % hysteresis -- 17 -- uvp propagation delay -- 270 -- ? s uvp enable delay relative to soft-start time -- t ss x 1.7 -- -- switching frequency f sw 400 500 600 khz
rt6238a/b 10 ds6238a/b-08 july 2017 www.richtek.com ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. typical application circuit table 1. suggested component values v out (v) r1 (k ? ) r2 (k ? ) c3 (pf) l1 ( ? h) c7 ( ? f) 1 20 46.4 -- 1 66 1.5 53.6 46.4 10 1 66 1.8 73.2 46.4 ? 10 1 66 2.5 120 46.4 ? 10 1.5 66 5 287 46.4 ? 10 2.5 66 ? pgood rt6238a/b pvcc fb v in 10f x 2 c1 0.1f c2 boot l1 1h 0.1f c6 22f x 3 c7 sw ss 10nf c5 1f c4 v out 1v 46.6k r2 v pvcc vin 7, 8 4 14 6 5 20k r1 9, 10, 11, 12 en 13 gnd 2 3 agnd 1 enable r pgood 100k r3* c3 c8* * : optional v pvcc power good
rt6238a/b 11 ds6238a/b-08 july 2017 www.richtek.com ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. typical operating characteristics output voltage vs. input voltage 1.02 1.03 1.04 1.05 1.06 1.07 1.08 1.09 1.10 4681012141618 input voltage (v) output voltage (v) v out = 1v rt6238a i out = 0a i out = 3a i out = 6a output voltage vs. input voltage 1.02 1.03 1.04 1.05 1.06 1.07 1.08 1.09 1.10 4681012141618 input voltage (v) output voltage (v) v out = 1v rt6238b i out = 0a i out = 3a i out = 6a efficiency vs. output current 70 74 78 82 86 90 94 98 012345678 output current (a) efficiency (%) rt6238b : pwm, v in = 5v, f sw = 500khz v out = 1v v out = 1.1v v out = 1.2v v out = 1.5v v out = 1.8v v out = 3.3v efficiency vs. output current 70 74 78 82 86 90 94 98 012345678 output current (a) efficiency (%) rt6238a : psm, v in = 5v, f sw = 500khz v out = 1v v out = 1.1v v out = 1.2v v out = 1.5v v out = 1.8v v out = 3.3v efficiency vs. output current 70 74 78 82 86 90 94 98 012345678 output current (a) efficiency (%) rt6238b : pwm, v in = 12v, f sw = 500khz v out = 1v v out = 1.1v v out = 1.2v v out = 1.5v v out = 1.8v v out = 3.3v v out = 5v efficiency vs. output current 70 74 78 82 86 90 94 98 012345678 output current (a) efficiency (%) rt6238a : psm, v in = 12v, f sw = 500khz v out = 1v v out = 1.1v v out = 1.2v v out = 1.5v v out = 1.8v v out = 3.3v v out = 5v
rt6238a/b 12 ds6238a/b-08 july 2017 www.richtek.com ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. output voltage vs. temperature 0.97 0.98 0.99 1.00 1.01 1.02 1.03 -50 -25 0 25 50 75 100 125 temperature (c) output voltage (v) v out = 1v, i out = 0.5a v in = 17v v in = 12v v in = 4.5v frequency vs. input voltage 400 420 440 460 480 500 520 540 560 580 600 4681012141618 input voltage (v) frequency (khz) 1 v out = 3.3v, i out = 0a frequency vs. temperature 450 470 490 510 530 550 -50 -25 0 25 50 75 100 125 temperature (c) frequency (khz) 1 v out = 1v time (100 s/div) load transient response v in = 12v, v out = 1v, i out = 0.1a to 8a i out (5a/div) v out (50mv/div) rt6238a output voltage vs. output current 1.02 1.03 1.04 1.05 1.06 1.07 1.08 1.09 1.10 012345678 output current (a) output voltage (v) rt6238b v in = 17v v in = 12v v in = 4.5v v out = 1v output voltage vs. output current 1.02 1.03 1.04 1.05 1.06 1.07 1.08 1.09 1.10 012345678 output current (a) output voltage (v) rt6238a v in = 17v v in = 12v v in = 4.5v v out = 1v
rt6238a/b 13 ds6238a/b-08 july 2017 www.richtek.com ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. time (100 s/div) load transient response v out (50mv/div) v in = 12v, v out = 1v, i out = 0.1a to 8a rt6238b i out (5a/div) time (100 s/div) load transient response v in = 12v, v out = 1v, i out = 4a to 8a i out (5a/div) v out (50mv/div) rt6238a time (2 s/div) output ripple voltage v in = 12v, v out = 1v, i out = 8a rt6238b i lx (3a/div) v out (10mv/div) v lx (10v/div) time (5ms/div) power on from en rt6238a i lx (10a/div) v en (5v/div) v out (1v/div) v lx (10v/div) v in = 12v, v out = 1v, i out = 8a time (20 s/div) output ripple voltage v in = 12v, v out = 1v, i out = 50ma rt6238a i lx (0.5a/div) v out (10mv/div) v lx (10v/div) time (2 s/div) output ripple voltage v in = 12v, v out = 1v, i out = 4a rt6238b i lx (3a/div) v out (10mv/div) v lx (10v/div)
rt6238a/b 14 ds6238a/b-08 july 2017 www.richtek.com ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. time (10ms/div) uvp short (hiccup mode) i lx (10a/div) v out (500mv/div) v lx (10v/div) v in = 12v, v out = 1v, i out = short v in (5v/div) time (2ms/div) uvp short (latch mode) i lx (10a/div) v out (1v/div) v lx (10v/div) v in = 12v, v out = 1v, i out = short v in (5v/div) time (5ms/div) power off from en v in = 12v, v out = 1v, i out = 8a rt6238a i lx (10a/div) v en (5v/div) v out (1v/div) v lx (10v/div)
rt6238a/b 15 ds6238a/b-08 july 2017 www.richtek.com ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. out in rms out(max) in out v v i = i 1 vv ?? ceramic capacitors are most often used because of their low cost, small size, high rms current ratings, and robust surge current capabilities. however, take care when these capacitors are used at the input of circuits supplied by a wall adapter or other supply connected through long, thin wires. current surges through the inductive wires can induce ringing at the rt6238a/b input which could potentially cause large, damaging voltage spikes at vin. if this phenomenon is observed, some bulk input capacitance may be required. ceramic capacitors (to meet the rms current requirement) can be placed in parallel with other types such as tantalum, electrolytic, or polymer (to reduce ringing and overshoot). choose capacitors rated at higher temperatures than required. several ceramic capacitors may be paralleled to meet the rms current, size, and height requirements of the application. the typical operating circuit uses two 10 f and one 0.1 f low esr ceramic capacitors on the input. output capacitor selection the rt6238a/b are optimized for ceramic output capacitors and best performance will be obtained using them. the total output capacitance value is usually determined by the desired output voltage ripple level and transient response requirements for sag (undershoot on positive load steps) and soar (overshoot on negative load steps). output ripple output ripple at the switching frequency is caused by the inductor current ripple and its effect on the output capacitor's esr and stored charge. these two ripple components are called esr ripple and capacitive ripple. since ceramic capacitors have extremely low esr and relatively little capacitance, both components are similar in amplitude and both should be considered if ripple is critical. application information inductor selection selecting an inductor involves specifying its inductance and also its required peak current. the exact inductor value is generally flexible and is ultimately chosen to obtain the best mix of cost, physical size, and circuit efficiency. lower inductor values benefit from reduced size and cost and they can improve the circuit's transient response, but they increase the inductor ripple current and output voltage ripple and reduce the efficiency due to the resulting higher peak currents. conversely, higher inductor values increase efficiency, but the inductor will either be physically larger or have higher resistance since more turns of wire are required and transient response will be slower since more time is required to change current (up or down) in the inductor. a good compromise between size, efficiency, and transient response is to use a ripple current ( i l ) about 15% to 40% of the desired full output load current. calculate the approximate inductor value by selecting the input and output voltages, the switching frequency (f sw ), the maximum output current (i out(max) ) and estimating a i l as some percentage of that current. inductor saturation current should be chosen over ic's current limit. input capacitor selection the input filter capacitors are needed to smooth out the switched current drawn from the input power source and to reduce voltage ripple on the input. the actual capacitance value is less important than the rms current rating (and voltage rating, of course). the rms input ripple current (i rms ) is a function of the input voltage, output voltage, and load current : ? ? ?? ??? out in out in sw l vvv l = vf i once an inductor value is chosen, the ripple current ( i l ) is calculated to determine the required peak inductor current. ? ? out in out l in sw l l(peak) out(max) l l(valley) out(max) vvv i= vf l i i = i 2 i i = i 2 ?? ? ?? ? ? ? ? ? ripple ripple(esr) ripple(c) v = v v ?? ripple(esr) l esr v = ir ? ?? l ripple(c) out sw i v = 8c f
rt6238a/b 16 ds6238a/b-08 july 2017 www.richtek.com ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. soft-start (ss) the rt6238a/b soft-start uses an external capacitor at ss to adjust the soft-start timing according to the following equation : ?? ? ? ?? ss ss cnf0.7 t ms i a ? ? following below equation to get the minimum capacitance range in order to avoid uv occur. out out lim ss ref cv0.61.2 t (i load current) 0.8 t6 a c v ??? ? ?? ? ? do not leave ss unconnected. enable operation (en) for automatic start-up, the low-voltage en pin must be connected to vin with a 100k resistor. en can be externally pulled to vin by adding a resistor-capacitor delay (r en and c en in figure 2). calculate the delay time using en's internal threshold where switching operation begins (1.2v, typical). an external mosfet can be added to implement digital control of en (figure 3). in this case, a 100k pull-up resistor, r en , is connected between vin and the en pin. mosfet q1 will be under logic control to pull down the en pin. to prevent enabling circuit when vin is smaller than the vout target value or some other desired voltage level, a resistive voltage divider can be placed between the input voltage and ground and connected to en to create an additional input under voltage lockout threshold (figure 4). figure 2. external timing control rt6238a/b en gnd v in r en c en en feed-forward capacitor (c ff ) the rt6238a/b are optimized for ceramic output capacitors and for low duty cycle applications. however for high-output voltages, with high feedback attenuation, the circuit's response becomes over-damped and transient response can be slowed. in high-output voltage circuits (v out > 3.3v) transient response is improved by adding a small ? feed-forward ? capacitor (c ff ) across the upper fb divider resistor (fi gure 1), to increase the circuit's q and reduce damping to speed up the transient response without affecting the steady-state stability of the circuit. choose a suitable capacitor value that following below step. ? get the bw the quickest method to do transient response from 30% load to 60% load. confirm the damping frequency. the damping frequency is bw. figure 1. c ff capacitor setting ? c ff can be calculated base on below equation : ff 1 c 2 3.1412 r1 bw 0.8 ? ???? rt6238a/b gnd fb r1 r2 v out c ff 30% load 60% load bw
rt6238a/b 17 ds6238a/b-08 july 2017 www.richtek.com ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. figure 6. external bootstrap diode external boot bootstrap diode when the input voltage is lower than 5.5v it is recommended to add an external bootstrap diode between vin (or vinr) and the boot pin to improve enhancement of the internal mosfet switch and improve efficiency. the bootstrap diode can be a low cost one such as 1n4148 or bat54. external boot capacitor series resistance the internal power mosfet switch gate driver is optimized to turn the switch on fast enough for low power loss and good efficiency, but also slow enough to reduce emi. switch turn-on is when most emi occurs since v sw rises rapidly. during switch turn-off, sw is discharged relatively slowly by the inductor current during the dead time between high-side and low-side switch on-times. in some cases it is desirable to reduce emi further, at the expense of some additional power dissipation. the switch turn-on can be slowed by placing a small (<47 ) resistance between boot and the external bootstrap capacitor. this will slow the high-side switch turn-on and v sw 's rise. to remove the resistor from the capacitor charging path (avoiding poor enhancement due to undercharging the boot capacitor), use the external diode shown in figure 6 to charge the boot capacitor and place the resistance between boot and the capacitor/diode connection. pvcc capacitor selection decouple pvcc to gnd with a 1 f ceramic capacitor. high grade dielectric (x7r, or x5r) ceramic capacitors are recommended for their stable temperature and bias voltage characteristics. sw boot 5v 0.1f rt6238a/b figure 4. resistor divider for lockout threshold setting figure 5. output voltage setting figure 3. digital enable control circuit output voltage setting set the desired output voltage using a resistive divider from the output to ground with the midpoint connected to fb. the output voltage is set according to the following equation : v out = 0.7 x (1 + r1 / r2) + 1/2 x v ripple for output voltage accuracy, use divider resistors with 1% or better tolerance. place the fb resistors within 5mm of the fb pin. choose r2 between 10k and 100k to minimize power consumption without excessive noise pick-up and calculate r1 as follows : out r2 (v 0.7) r1 0.7 ?? ? rt6238a/b en gnd 100k v in r en q1 enable rt6238a/b en gnd v in r en1 r en2 rt6238a/b gnd fb r1 r2 v out
rt6238a/b 18 ds6238a/b-08 july 2017 www.richtek.com ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. ?? ff 2 sw s 1 c = 2f l ? ?? furthermore, a resistor r can be added to differentiate between dc and ac feedback traces, which needs to be much larger than c ff impedance z cff but much lower than the feedback resistor r1 and r2. ?? cff sw ff 1 z = << r << r1 & r2 2f c ? ?? remote feedback improvement in order to supply an accurate output voltage for the remote load, the fb pin needs to sense the load voltage via an external resistive voltage divider. however, the stray inductance l s in the long trace causes the phase delay of feedback voltage, which further results in the system instability and large ripple. for solving this issue, a feed- forward capacitor c ff is used to eliminate the phase delay of feedback voltage, which can be calculated by the following equation. figure 7. application circuit for remote feedback improvement pgood rt6238a/b pvcc fb v in 10f x 2 c1 0.1f c2 boot l1 1h 0.1f c6 22f x 3 c7 sw ss 10nf c5 1f c4 v out 1v 46.6k r2 c ff v pvcc vin 7, 8 4 14 6 5 20k r1 9, 10, 11, 12 en 13 gnd 2 3 agnd 1 enable l s v cout z load r r pgood 100k v pvcc power good
rt6238a/b 19 ds6238a/b-08 july 2017 www.richtek.com ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. thermal considerations for continuous operation, do not exceed absolute maximum junction temperature. the maximum power dissipation depends on the thermal resistance of the ic package, pcb layout, rate of surrounding airflow, and difference between junction and ambient temperature. the maximum power dissipation can be calculated by the following formula : p d(max) = (t j(max) ? t a ) / ja where t j(max) is the maximum junction temperature, t a is the ambient temperature, and ja is the junction to ambient thermal resistance. for recommended operating condition specifications, the maximum junction temperature is 125 c. the junction to ambient thermal resistance, ja , is layout dependent. for uqfn-14l 2x3 (fc) package, the thermal resistance, ja , is 47.5 c/w on a standard four-layer thermal test board. the maximum power dissipation at t a = 25 c can be calculated by the following formula : p d(max) = (125 c ? 25 c) / (47.5 c/w) = 2.1w for uqfn-14l 2x3 (fc) package the maximum power dissipation depends on the operating ambient temperature for fixed t j(max) and thermal resistance, ja . the derating curve in figure 8 allows the designer to see the effect of rising ambient temperature on the maximum power dissipation. figure 8. derating curve of maximum power dissipation 0.0 0.4 0.8 1.2 1.6 2.0 2.4 0 25 50 75 100 125 ambient temperature (c) maximum power dissipation (w) 1 four-layer pcb layout consideration ? follow the pcb layout guidelines for optimal performance of the device. ? keep the traces of the main current paths as short and wide as possible. ? put the input capacitor as close as possible to vin and vin pins. ? sw node is with high frequency voltage swing and should be kept at small area. keep analog components away from the sw node to prevent stray capacitive noise pickup. ? connect feedback network behind the output capacitors. keep the loop area small. place the feedback components near the device. ? connect all analog grounds to common node and then connect the common node to the power ground behind the output capacitors. ? an example of pcb layout guide is shown in figure 8 and figure 9 for reference.
rt6238a/b 20 ds6238a/b-08 july 2017 www.richtek.com ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. figure 10. pcb layout guide (bottom layer) figure 9. pcb layout guide (top layer) c ss pgood pvcc agnd fb sw gnd gnd gnd vin ss gnd boot en vin 6 13 11 10 9 8 1 2 3 4 14 5 12 7 c in v in gnd v out r1 r2 v out v in r en 5v top layer the feedback components must be connected as close to the device as possible. sw should be connected to inductor by wide and short trace. keep sensitive components away from this trace . keep sensitive components away from this c boot . agnd must be connected clear ground. connect ic pin trace as wide as possible for thermal consideration power good indicator open-drain output. internal regulator output. connect a 1f capacitor to gnd to stabilize output voltage. input capacitor must be placed as close to ic vin-gnd as possible. add extra vias for thermal consideration v in bottom layer add via for thermal consideration v out gnd
rt6238a/b 21 ds6238a/b-08 july 2017 www.richtek.com ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. suggested inductors for typical application circuit component supplier part no. inductance ( ? h) dcr (m ? ) dimensions (mm) we 7443320100 1 1.85 12.1 x 11.4 x 9.5 we 744325120 1.2 1.8 10.2 x 10.2 x 4.7 we 7443551200 2 2.6 12.8 x 12.8 x 6.2 recommended component selection for typical application. component supplier part no. capacitance ( ? f) case size murata grm31cr61e106k 10 1206 tdk c3225x5r1e106k 10 1206 taiyo yuden tmk316bj106ml 10 1206 murata grm31cr60j476m 47 1206 tdk c3225x5r0j476m 47 1210 taiyo yuden emk325bj476mm 47 1210 murata grm32er71c226m 22 1210 tdk c3225x5r1c226m 22 1210
rt6238a/b 22 ds6238a/b-08 july 2017 www.richtek.com ? copyright 2017 richtek technology corporation. all rights reserved. is a registered trademark of ric htek technology corporation. outline dimension u-type 14l qfn 2x3 (fc) package min. max. min. max. a 0.500 0.600 0.020 0.024 a1 0.000 0.050 0.000 0.002 a3 0.100 0.152 0.004 0.006 b 0.200 0.300 0.008 0.012 d 1.900 2.100 0.075 0.083 e 2.900 3.100 0.114 0.122 e k l 0.400 0.500 0.016 0.020 l1 2.325 2.425 0.092 0.095 l2 0.825 0.925 0.032 0.036 l3 0.300 0.400 0.012 0.016 l4 1.825 1.925 0.072 0.076 l5 0.325 0.425 0.013 0.017 0.325 0.013 symbol dimensions in millimeters dimensions in inches 0.500 0.020
rt6238a/b 23 ds6238a/b-08 july 2017 www.richtek.com richtek technology corporation 14f, no. 8, tai yuen 1 st street, chupei city hsinchu, taiwan, r.o.c. tel: (8863)5526789 richtek products are sold by description only. customers should obtain the latest relevant information and data sheets before p lacing orders and should verify that such information is current and complete. richtek cannot assume responsibility for use of any circuitry other than circuit ry entirely embodied in a richtek product. information furnished by richtek is believed to be accurate and reliable. however, no responsibility is assumed by ric htek or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. no license is granted by i mplication or otherwise under any patent or patent rights of richtek or its subsidiaries. footprint information package number of pin footprint dimension (mm) tolerance p ax ay by c*4 c1*3 c2 c3 c4*4 c5 d*14 k k1 uqfn2*3-14(fc) 14 0.500 2.800 3.800 2.250 0.850 0.775 2.775 1.275 0.750 2.275 0.250 0.325 0.250 0.050 ?

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